Technical Q&A's

Hardware Contents

hw31 - UpTime's values are consistently slow? - (19-Oct-98)
hw30 - Making the ADBOp call from CFM-68K - (11-May-98)
hw29 - Gestalt Values for Recent Macintosh Models - (Updated 13-July-98)
hw28 - DR Emulator Caches - (8-Apr-96)
hw27 - DDC Information Source - (22-Nov-95)
hw26 - PCI Type 1 Cycles - (15-July-95)
hw25 - PCI Interrupts - (15-July-95)
hw24 - Creating a Monitors Control Panel Extension - (15-July-95)
hw23 - Testing PCI drivers without any device - (15-July-95)
hw22 - Asserting fast-back-to-back transfers in the PCI Power Mac - (15-July-95)
hw21 - Verifying the PCI Interface - (15-July-95)
hw20 - PCI Card's Assigned-Address Properties - (15-July-95)
hw19 - Explicitly Forcing PCI Burst Transfers - (15-July-95)
hw18 - Getting the Processor Type and Speed on a PCI Mac - (15-July-95)
hw17 - PCI Drivers: I/O Queue & KillIO - (15-July-95)
hw16 - PCI Device and Driver Matching - (15-July-95)
hw15 - GetDriverDiskFragment and 'ndrv' Drivers - (15-July-95)
hw14 - DMA Not Working with PCI Bus - (15-July-95)
hw13 - Developing a SCSI SIM for a PCI SCSI Controller - (15-July-95)
hw12 - PCI Support for the ISA Style Bracket - (15-July-95)
hw11 - PCI Bus and IEEE Standards - (15-July-95)
hw10 - Interrupt Management - (15-July-95)
hw09 - Ethernet Driver Message Blocks - (15-July-95)
hw08 - Implementing read-modify-write on PCI - (15-July-95)
hw07 - Disconnect/Retry - (15-July-95)
hw06 - PCI Bus Performance with Memory Write and Memory Write Invalidate Commands - (15-July-95)
hw05 - PCI Bus Performance with Memory Read and Memory Read Multiple Commands - (15-July-95)
hw04 - PowerBook and Sleep Mode - (1-May-95)
hw03 - NuBus Timing Problem - (1-May-95)
hw02 - NuBus Declaration ROM - (1-May-95)
hw01 - Determining If a PCI Bus Exists - (Updated 27-Nov-96)

Related File Contents